Non-volatile memory devices such as magnetic random access memory (MRAM) devices are of interest for replacement of volatile memory devices such as dynamic random access memory (DRAM) devices. Such MRAM devices include an array of individual MRAM cells which may be tunnelling magnetoresistance memory (TMR) cells, colossal magnetoresistance memory cells (CMR) or giant magnetoresistance memory (GMR) cells.
In general, the MRAM cells include a data layer and a reference layer. The data layer is composed of a magnetic material and during a write operation the magnetisation of the data layer can be switched between two opposing states by an applied magnetic field and thus binary information can be stored. The reference layer usually is composed of a magnetic material in which the magnetisation is pinned so that the magnetic field that is applied to the data layer and in part penetrates the reference layer, is of insufficient strength to switch the magnetisation in the reference layer.
For example in a TMR cell the data layer and the reference layer are separated by a thin dielectric layer which is arranged so that a tunnelling junction is formed. The probability that electrons tunnel through the dielectric layer depends on the direction of the magnetisation in the data layer relative to the direction of the magnetisation in the reference layer. Therefore, the structure is “magnetoresistant” and stored information can be derived from the magnitude of tunnelling currents through the memory cell.
In general, it is of advantage that the magnetic memory cells are as small as possible to increase memory density and reduce cost. However, as cells become smaller, thermal stability issues become more important. To ensure that stored information is not lost because of random switching induced by environmental influences, it is necessary that the data layers of small magnetic memory cells are arranged so that the magnetic field strength that is required for switching the magnetisation is higher than that for larger memory cells. Unfortunately the necessity to generate the larger fields strength makes switching of the memory cells during the write operation more difficult.
It is known that the increasing the temperature of the magnetic memory cell lowers the magnetic field strength that is required for switching. For example, when an electrical current passes through the magnetic memory cell, heat is developed in the cell. However, the developed heat is easily conducted through the bit lines away from the memory cell and therefore cannot be utilised to facilitate switching of the magnetic memory cell.
There is therefore a need for a magnetic memory device in which loss of heat from the magnetic memory cell is reduced and therefore the heat can be utilised to facilitate switching.